1. Field of the Invention
This invention relates to the masking of vias in circuit patterns or circuit boards, and is particularly concerned with techniques for covering vias with insulating material so as to reduce or eliminate heat-induced printed circuit board or chip carrier package warp during the wavesolder process.
2. Description of the Related Art
The past decade has witnessed an explosion in demand for increasingly powerful electronic products with smaller and smaller packages. In response, manufacturers have incorporated high density component assemblies into their products; but limits were soon reached as to improvements in product cost, packaging density, circuit performance, and reliability in using conventional through hole packaged component assembly technology. Therefore, manufacturers invoked a trend towards the use of surface mount devices in their designs in the mid-1980's.
Surface mountable devices do not require component mounting or lead holes for board affixation, and their packaging size is relatively smaller than that of their pin-through cousins. With this technology, manufacturers are able to reduce overall circuit board assembly size through increased placement densities, finer pitch component terminals, and dual-sided component mounting. Further, the use of smaller mass surface mount technology (SMT) components increases vibration and shock resistance. Also, smaller component sizes and increased placement density mean shorter distances for signals to travel, thereby improving high speed, high frequency circuit performance.
More recently, component manufacturers have introduced a type of surface-mountable component chip package, known as ball grid array or BGA, which discards the use of external leads in integrated circuit chip packaging altogether. Connections between the BGA device and the circuit board are made through contact pads placed on the underside of the chip. Visually, the arrangement of contact pads appears as a two-dimensional grid or matrix of small solder blobs or balls extending from the underside of the chip, hence the name Ball Grid Array. A complementary contact pad array or landing area is located on a surface of the circuit board where the BGA device is to be positioned. Since no leads extend from the BGA package, its effective footprint is appreciably smaller than that of comparable dual or quad flat package SMT designs.
Since typically the BGA footprint is so compact and its pin count and density are so high, surface circuit traces cannot be used to connect to the interior contact pads of the BGA landing areas. Instead, contact pad access is achieved by connecting each contact pad to an adjacent through via. The vias, in turn, are connected to circuitry patterns on the other board layers so as to complete electrical integration of the BGA components. Thus, board designers will put a significant number of through vias within the BGA landing areas and directly underneath BGA components.
Because of its inherent size advantage, electronics manufacturers are motivated to incorporate BGA-packaged devices into their space and volume sensitive designs. However, a number of manufacturing defects have been observed in boards populated with BGA components. The BGA component and other top surface mounted components are installed on the circuit board using conventional techniques. Next, bottom side components are applied and the circuit board undergoes a wavesoldering process to affix the bottom side components and to solder any through hole components. The defective circuit boards exhibit pin-cracking defects or solder joint fractures at contact pads within the BGA landing areas after undergoing the wavesolder processing. The defects disrupt circuit continuity and can lead to board failure. Furthermore, the defect rate appears to be dependent on the physical location of the BGA devices with respect to any printed circuit board stiffeners affixed during wavesoldering.
These defects add significant rework and repair costs, and present a quality control problem that few manufacturers would risk. Serious modification to or employing alternatives to conventional wavesolder processing would involve extensive retrofitting of existing board assembly production facilities, not to mention possible board redesign, with no guarantee that it would eliminate the problem, or at least, make BGA a cost effective design choice. Therefore, in order for electronics manufacturers to reap the space-saving benefits of BGA technology, it is desirable to rectify the wavesolder manufacturing defects without significant line retooling or costly board redesign.